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The ARM Cortex-A8 is a 32-bit processor core licensed by ARM Holdings implementing the ARMv7-A architecture. Compared to the ARM11 core, the Cortex-A8 is a dual-issue superscalar design, achieving roughly twice the instructions executed per clock cycle. The Cortex-A8 was the first Cortex design to be adopted on a large scale for use in consumer devices. ==Features== (詳細はSuperscalar dual-issue microarchitecture * NEON SIMD instruction set extension 〔(Cortex-A8 Specification Summary; ARM Holdings. )〕 * 13-stage integer pipeline and 10-stage NEON pipeline * VFPv3 Floating Point Unit * Thumb-2 instruction set encoding * Jazelle RCT (Also known as ThumbEE instruction set) * Advanced branch prediction unit with >95% accuracy * Integrated level 2 Cache (0–4 MiB) * 2.0 DMIPS/MHz 抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)』 ■ウィキペディアで「ARM Cortex-A8」の詳細全文を読む スポンサード リンク
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